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lt1963a series 1 1963afe typical a pplica t ion descrip t ion 1.5a, low noise, fast transient response ldo regulators fea t ures a pplica t ions n optimized for fast transient response n output current: 1.5a n dropout voltage: 340mv n low noise: 40v rms (10hz to 100khz) n 1ma quiescent current n no protection diodes needed n controlled quiescent current in dropout n fixed output voltages: 1.5v, 1.8v, 2.5v, 3.3v n adjustable output from 1.21v to 20v n < 1a quiescent current in shutdown n stable with 10f output capacitor* n stable with ceramic capacitors* n reverse battery protection n no reverse current n thermal limiting n 5-lead to-220, dd, 3-lead sot-223 and 8-lead so packages the lt ? 1963a series are low dropout regulators optimized for fast transient response. the devices are capable of supplying 1.5a of output current with a dropout voltage of 340mv. operating quiescent current is 1ma, dropping to < 1a in shutdown. quiescent current is well controlled; it does not rise in dropout as it does with many other regula- tors. in addition to fast transient response, the lt1963a regulators have very low output noise which makes them ideal for sensitive rf supply applications. output voltage range is from 1.21v to 20v. the lt1963a regulators are stable with output capacitors as low as 10f. internal protection circuitry includes reverse bat - tery protection, current limiting, thermal limiting and reverse current protection. the devices are available in fixed output voltages of 1.5v, 1.8v, 2.5v, 3.3v and as an adjustable device with a 1.21v reference voltage. the lt1963a regulators are available in 5-lead to-220, dd, 3 - lead sot -223, 8-lead so and 16-lead tssop packages. 3.3v to 2.5v regulator n 3.3v to 2.5v logic power supplies n post regulator for switching supplies in shdn 10f* *tantalum, ceramic or aluminum electrolytic 1963a ta01 out v in > 3v sense gnd lt1963a-2.5 2.5v 1.5a 10f* + + output current (a) 0 dropout voltage (mv) 200 300 1.6 1963a ta02 100 0 0.4 0.8 1.2 0.2 0.6 1.0 1.4 400 150 250 50 350 dropout voltage l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents including 6118263, 6144250. *see applications information section.
lt1963a series 2 1963afe p in c on f igura t ion a bsolu t e maxi m u m r a t ings (note 1) in pin voltage ........................................................ 20v out pin v oltage ...................................................... 20v input to output differential v oltage (note 2) ........... 20v sense pin v oltage ............................................... 20v adj pin voltage ...................................................... 7v shdn pin voltage ................................................. 20v output short-cir cuit duration ........................ indefnite operating junction t emperature range (note 3) l t1963ae ........................................... C 40c to 125c lt1963ai ............................................C 40c to 125c lt1963amp ....................................... C 55c to 125c storage temperature range ................... C 65c to 150c lead temperature (soldering, 10 sec) .................. 300c q package 5-lead plastic dd tab is gnd front view sense/adj* out gnd in shdn 5 4 3 2 1 *pin 5 = sense for lt1963a-1.5/lt1963a-1.8/ lt1963a-2.5/lt1963a-3.3 = adj for lt1963a t jmax = 150c, ja = 30c/ w t package 5-lead plastic to-220 sense/ adj* out gnd in shdn front view tab is gnd 5 4 3 2 1 *pin 5 = sense for lt1963a-1.5/lt1963a-1.8/ lt1963a-2.5/lt1963a-3.3 = adj for lt1963a t jmax = 150c, ja = 50c/ w fe package 16-lead plastic tssop exposed pad (pin 17) is gnd. must be soldered to the pcb. 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 gnd nc out out out sense/adj* gnd gnd gnd nc in in in nc shdn gnd 17 *pin 6 = sense for lt1963a-1.5/lt1963a-1.8/ lt1963a-2.5/lt1963a-3.3 = adj for lt1963a t jmax = 150c, ja = 38c/ w 3 2 1 front view tab is gnd out gnd in st package 3-lead plastic sot-223 t jmax = 150c, ja = 50c/ w 1 2 3 4 8 7 6 5 top view in gnd gnd shdn out sense/adj* gnd nc s8 package 8-lead plastic so *pin 2 = sense for lt1963a-1.5/lt1963a-1.8/ lt1963a-2.5/lt1963a-3.3 = adj for lt1963a t jmax = 150c, ja = 70c/ w
lt1963a series 3 1963afe o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range lt1963aeq#pbf lt1963aeq#trpbf lt1963aeq 5-lead plastic dd-pak C40c to 125c lt1963aiq#pbf lt1963aiq#trpbf lt1963aiq 5-lead plastic dd-pak C40c to 125c lt1963ampq#pbf lt1963ampq#trpbf lt1963ampq 5-lead plastic dd-pak C55c to 125c lt1963aeq-1.5#pbf lt1963aeq-1.5#trpbf lt1963aeq-1.5 5-lead plastic dd-pak C40c to 125c lt1963aeq-1.8#pbf lt1963aeq-1.8#trpbf lt1963aeq-1.8 5-lead plastic dd-pak C40c to 125c lt1963aeq-2.5#pbf lt1963aeq-2.5#trpbf lt1963aeq-2.5 5-lead plastic dd-pak C40c to 125c lt1963aeq-3.3#pbf lt1963aeq-3.3#trpbf lt1963aeq-3.3 5-lead plastic dd-pak C40c to 125c lt1963aet#pbf lt1963aet#trpbf lt1963aet 5-lead plastic to-220 C40c to 125c lt1963ait#pbf lt1963ait#trpbf lt1963ait 5-lead plastic to-220 C40c to 125c lt1963aet-1.5#pbf lt1963aet-1.5#trpbf lt1963aet-1.5 5-lead plastic to-220 C40c to 125c lt1963aet-1.8#pbf lt1963aet-1.8#trpbf lt1963aet-1.8 5-lead plastic to-220 C40c to 125c lt1963aet-2.5#pbf lt1963aet-2.5#trpbf lt1963aet-2.5 5-lead plastic to-220 C40c to 125c lt1963aet-3.3#pbf lt1963aet-3.3#trpbf lt1963aet-3.3 5-lead plastic to-220 C40c to 125c lt1963aefe#pbf lt1963aefe#trpbf 1963aefe 16-lead plastic tssop C40c to 125c lt1963aife#pbf lt1963aife#trpbf 1963aife 16-lead plastic tssop C40c to 125c lt1963aefe-1.5#pbf lt1963aefe-1.5#trpbf 1963aefe15 16-lead plastic tssop C40c to 125c lt1963aefe-1.8#pbf lt1963aefe-1.8#trpbf 1963aefe18 16-lead plastic tssop C40c to 125c lt1963aefe-2.5#pbf lt1963aefe-2.5#trpbf 1963aefe25 16-lead plastic tssop C40c to 125c lt1963aefe-3.3#pbf lt1963aefe-3.3#trpbf 1963aefe33 16-lead plastic tssop C40c to 125c lt1963aest-1.5#pbf lt1963aest-1.5#trpbf 963a15 3-lead plastic sot-223 C40c to 125c lt1963aest-1.8#pbf lt1963aest-1.8#trpbf 963a18 3-lead plastic sot-223 C40c to 125c lt1963aest-2.5#pbf lt1963aest-2.5#trpbf 963a25 3-lead plastic sot-223 C40c to 125c lt1963aest-3.3#pbf lt1963aest-3.3#trpbf 963a33 3-lead plastic sot-223 C40c to 125c lt1963aes8#pbf lt1963aes8#trpbf 1963a 8-lead plastic so C40c to 125c lt1963ais8#pbf lt1963ais8#trpbf 1963a 8-lead plastic so C40c to 125c lt1963amps8#pbf lt1963amps8#trpbf 963amp 8-lead plastic so C55c to 125c lt1963aes8-1.5#pbf lt1963aes8-1.5#trpbf 963a15 8-lead plastic so C40c to 125c lt1963aes8-1.8#pbf lt1963aes8-1.8#trpbf 963a18 8-lead plastic so C40c to 125c lt1963aes8-2.5#pbf lt1963aes8-2.5#trpbf 963a25 8-lead plastic so C40c to 125c lt1963aes8-3.3#pbf lt1963aes8-3.3#trpbf 963a33 8-lead plastic so C40c to 125c lead based finish tape and reel part marking* package description temperature range lt1963aeq lt1963aeq#tr lt1963aeq 5-lead plastic dd-pak C40c to 125c lt1963aiq lt1963aiq#tr lt1963aiq 5-lead plastic dd-pak C40c to 125c lt1963ampq lt1963ampq#tr lt1963ampq 5-lead plastic dd-pak C55c to 125c lt1963aeq-1.5 lt1963aeq-1.5#tr lt1963aeq-1.5 5-lead plastic dd-pak C40c to 125c lt1963aeq-1.8 lt1963aeq-1.8#tr lt1963aeq-1.8 5-lead plastic dd-pak C40c to 125c lt1963aeq-2.5 lt1963aeq-2.5#tr lt1963aeq-2.5 5-lead plastic dd-pak C40c to 125c lt1963aeq-3.3 lt1963aeq-3.3#tr lt1963aeq-3.3 5-lead plastic dd-pak C40c to 125c lt1963aet lt1963aet#tr lt1963aet 5-lead plastic to-220 C40c to 125c lt1963ait lt1963ait#tr lt1963ait 5-lead plastic to-220 C40c to 125c
lt1963a series 4 1963afe or d er in f or m a t ion lead based finish tape and reel part marking* package description temperature range lt1963aet-1.5 lt1963aet-1.5#tr lt1963aet-1.5 5-lead plastic to-220 C40c to 125c lt1963aet-1.8 lt1963aet-1.8#tr lt1963aet-1.8 5-lead plastic to-220 C40c to 125c lt1963aet-2.5 lt1963aet-2.5#tr lt1963aet-2.5 5-lead plastic to-220 C40c to 125c lt1963aet-3.3 lt1963aet-3.3#tr lt1963aet-3.3 5-lead plastic to-220 C40c to 125c lt1963aefe lt1963aefe#tr 1963aefe 16-lead plastic tssop C40c to 125c lt1963aife lt1963aife#tr 1963aife 16-lead plastic tssop C40c to 125c lt1963aefe-1.5 lt1963aefe-1.5#tr 1963aefe15 16-lead plastic tssop C40c to 125c lt1963aefe-1.8 lt1963aefe-1.8#tr 1963aefe18 16-lead plastic tssop C40c to 125c lt1963aefe-2.5 lt1963aefe-2.5#tr 1963aefe25 16-lead plastic tssop C40c to 125c lt1963aefe-3.3 lt1963aefe-3.3#tr 1963aefe33 16-lead plastic tssop C40c to 125c lt1963aest-1.5 lt1963aest-1.5#tr 963a15 3-lead plastic sot-223 C40c to 125c lt1963aest-1.8 lt1963aest-1.8#tr 963a18 3-lead plastic sot-223 C40c to 125c lt1963aest-2.5 lt1963aest-2.5#tr 963a25 3-lead plastic sot-223 C40c to 125c lt1963aest-3.3 lt1963aest-3.3#tr 963a33 3-lead plastic sot-223 C40c to 125c lt1963aes8 lt1963aes8#tr 1963a 8-lead plastic so C40c to 125c lt1963ais8 lt1963ais8#tr 1963a 8-lead plastic so C40c to 125c lt1963amps8 lt1963amps8#tr 963amp 8-lead plastic so C55c to 125c lt1963aes8-1.5 lt1963aes8-1.5#tr 963a15 8-lead plastic so C40c to 125c lt1963aes8-1.8 lt1963aes8-1.8#tr 963a18 8-lead plastic so C40c to 125c lt1963aes8-2.5 lt1963aes8-2.5#tr 963a25 8-lead plastic so C40c to 125c lt1963aes8-3.3 lt1963aes8-3.3#tr 963a33 8-lead plastic so C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
lt1963a series 5 1963afe e lec t rical c harac t eris t ics the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. (note 3) parameter conditions min typ max units minimum input voltage (notes 4,12) i load = 0.5a i load = 1.5a l 1.9 2.1 2.5 v v regulated output voltage (note 5) lt1963a-1.5 v in = 2.21v, i load = 1ma 2.5v < v in < 20v, 1ma < i load < 1.5a l 1.477 1.447 1.500 1.500 1.523 1.545 v v lt1963a-1.8 v in = 2.3v, i load = 1ma 2.8v < v in < 20v, 1ma < i load < 1.5a l 1.773 1.737 1.800 1.800 1.827 1.854 v v lt1963a-2.5 v in = 3v, i load = 1ma 3.5v < v in < 20v, 1ma < i load < 1.5a l 2.462 2.412 2.500 2.500 2.538 2.575 v v lt1963a-3.3 v in = 3.8v, i load = 1ma 4.3v < v in < 20v, 1ma < i load < 1.5a l 3.250 3.200 3.300 3.300 3.350 3.400 v v adj pin voltage (notes 4, 5) lt1963a v in = 2.21v, i load = 1ma 2.5v < v in < 20v, 1ma < i load < 1.5a l 1.192 1.174 1.210 1.210 1.228 1.246 v v line regulation lt1963a-1.5 ?v in = 2.21v to 20v, i load = 1ma lt1963a-1.8 ?v in = 2.3v to 20v, i load = 1ma lt1963a-2.5 ?v in = 3v to 20v, i load = 1ma lt1963a-3.3 ?v in = 3.8v to 20v, i load = 1ma lt1963a (note 4) ?v in = 2.21v to 20v, i load = 1ma l l l l l 2.0 2.5 3.0 3.5 1.5 6 7 10 10 5 mv mv mv mv mv load regulation lt1963a-1.5 v in = 2.5v, ?i load = 1ma to 1.5a v in = 2.5v, ?i load = 1ma to 1.5a 2 9 18 mv mv lt1963a-1.8 v in = 2.8v, ?i load = 1ma to 1.5a v in = 2.8v, ?i load = 1ma to 1.5a 2 10 20 mv mv lt1963a-2.5 v in = 3.5v, ?i load = 1ma to 1.5a v in = 3.5v, ?i load = 1ma to 1.5a 2.5 15 30 mv mv lt1963a-3.3 v in = 4.3v, ?i load = 1ma to 1.5a v in = 4.3v, ?i load = 1ma to 1.5a 3 20 35 mv mv lt1963a (note 4) v in = 2.5v, ?i load = 1ma to 1.5a v in = 2.5v, ?i load = 1ma to 1.5a 2 8 15 mv mv dropout voltage v in = v out(nominal) (notes 6, 7, 12) i load = 1ma i load = 1ma 0.02 0.06 0.10 v v i load = 100ma i load = 100ma 0.10 0.17 0.22 v v i load = 500ma i load = 500ma 0.19 0.27 0.35 v v i load = 1.5a i load = 1.5a 0.34 0.45 0.55 v v gnd pin current v in = v out(nominal) + 1v (notes 6, 8) i load = 0ma i load = 1ma i load = 100ma i load = 500ma i load = 1.5a 1.0 1.1 3.8 15 80 1.5 1.6 5.5 25 120 ma ma ma ma ma output voltage noise c out = 10f, i load = 1.5a, bw = 10hz to 100khz 40 v rms adj pin bias current (notes 4, 9) 3 10 a shutdown threshold v out = off to on v out = on to off 0.25 0.90 0.75 2 v v shdn pin current (note 10) v shdn = 0v v shdn = 20v 0.01 3 1 30 a a quiescent current in shutdown v in = 6v, v shdn = 0v 0.01 1 a
lt1963a series 6 1963afe e lec t rical c harac t eris t ics the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. (note 3) parameter conditions min typ max units ripple rejection v in C v out = 1.5v (avg), v ripple = 0.5v p-p , f ripple = 120hz, i load = 0.75a 55 63 db current limit v in = 7v, v out = 0v v in = v out(nominal) + 1v, ?v out = C 0.1v 1.6 2 a a input reverse leakage current (note 13) q, t, s8 packages v in = C20v, v out = 0 st package v in = C20v, v out = 0 1 2 ma ma reverse output current (note 11) lt1963a-1.5 v out = 1.5v, v in < 1.5v lt1963a-1.8 v out = 1.8v, v in < 1.8v lt1963a-2.5 v out = 2.5v, v in < 2.5v lt1963a-3.3 v out = 3.3v, v in < 3.3v lt1963a (note 4) v out = 1.21v, v in < 1.21v 600 600 600 600 300 1200 1200 1200 1200 600 a a a a a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: absolute maximum input to output differential voltage can not be achieved with all combinations of rated in pin and out pin voltages. with the in pin at 20v, the out pin may not be pulled below 0v. the total measured voltage from in to out can not exceed 20v. note 3: the lt1963a regulators are tested and specifed under pulse load conditions such that t j t a . the lt1963ae is 100% tested at t a = 25c. performance at C40c and 125c is assured by design, characterization and correlation with statistical process controls. the lt1963ai is guaranteed over the full C40c to 125c operating junction temperature range. the lt1963amp is 100% tested and guaranteed over the C55c to 125c operating junction temperature range. note 4: the lt1963a (adjustable version) is tested and specifed for these conditions with the adj pin connected to the out pin. note 5: operating conditions are limited by maximum junction temperature. the regulated output voltage specifcation will not apply for all possible combinations of input voltage and output current. when operating at maximum input voltage, the output current range must be limited. when operating at maximum output current, the input voltage range must be limited. note 6: to satisfy requirements for minimum input voltage, the lt1963a (adjustable version) is tested and specifed for these conditions with an external resistor divider (two 4.12k resistors) for an output voltage of 2.4v. the external resistor divider will add a 300a dc load on the output. note 7: dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specifed output current. in dropout, the output voltage will be equal to: v in C v dropout . note 8: gnd pin current is tested with v in = v out(nominal) + 1v and a current source load. the gnd pin current will decrease at higher input voltages. note 9: adj pin bias current fows into the adj pin. note 10: shdn pin current fows into the shdn pin. note 11: reverse output current is tested with the in pin grounded and the out pin forced to the rated output voltage. this current fows into the out pin and out the gnd pin. note 12: for the lt1963a, lt1963a-1.5 and lt1963a-1.8 dropout voltage will be limited by the minimum input voltage specifcation under some output voltage/load conditions. note 13: for the st package, the input reverse leakage current increases due to the additional reverse leakage current for the shdn pin, which is tied internally to the in pin.
lt1963a series 7 1963afe typical p er f or m ance c harac t eris t ics output current (a) 0 dropout voltage (mv) 500 450 400 350 300 250 200 150 100 50 0 0.4 0.8 1.0 1963a g01 0.2 0.6 1.2 1.4 1.6 t j = 125c t j = 25c output current (a) guaranteed dropout voltage (mv) 600 500 400 300 200 100 0 0 0.4 0.8 1.0 1963a g02 0.2 0.6 1.2 1.4 1.6 t j 125c t j 25c = test points temperature (c) ?50 dropout voltage (mv) 500 450 400 350 300 250 200 150 100 50 0 0 50 75 1963a g03 ?25 25 100 125 i l = 100ma i l = 1ma i l = 0.5a i l = 1.5a typical dropout voltage guaranteed dropout voltage dropout voltage temperature (c) ?50 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 25 75 1963a g04 ?25 0 50 100 125 quiescent current (ma) lt1963a-1.5/1.8/-2.5/-3.3 lt1963a v in = 6v r l = , i l = 0 v shdn = v in temperature (c) ?50 output voltage (v) 100 1963a g05 0 50 1.84 1.83 1.82 1.81 1.80 1.79 1.78 1.77 1.76 ?25 25 75 125 i l = 1ma quiescent current lt1963a-1.8 output voltage lt1963a-1.5 output voltage temperature (c) ?50 output voltage (v) 1.53 25 1963a g40 1.50 1.48 ?25 0 50 1.47 1.46 1.54 1.52 1.51 1.49 75 100 125 i l = 1ma temperature (c) ?50 output voltage (v) 100 1963a g07 0 50 3.38 3.36 3.34 3.32 3.30 3.28 3.26 3.24 3.22 ?25 25 75 125 i l = 1ma temperature (c) ?50 adj pin voltage (v) 100 1963a g08 0 50 1.230 1.225 1.220 1.215 1.210 1.205 1.200 1.195 1.190 ?25 25 75 125 i l = 1ma lt1963a-3.3 output voltage lt1963a adj pin voltage temperature (c) ?50 output voltage (v) 100 1963a g06 0 50 2.58 2.56 2.54 2.52 2.50 2.48 2.46 2.44 2.42 ?25 25 75 125 i l = 1ma lt1963a-2.5 output voltage
lt1963a series 8 1963afe input voltage (v) 0 gnd pin current (ma) 25 20 15 10 5 0 4 1963a g13 1 2 3 1098765 t j = 25c v shdn = v in *for v out = 1.8v r l = 180, i l = 10ma* r l = 18, i l = 100ma* r l = 6, i l = 300ma* input voltage (v) 0 gnd pin current (ma) 25 20 15 10 5 0 4 1963a g14 1 2 3 1098765 r l = 250, i l = 10ma* r l = 25, i l = 100ma* r l = 8.33, i l = 300ma* t j = 25c v shdn = v in *for v out = 2.5v lt1963a-1.8 gnd pin current lt1963a-2.5 gnd pin current input voltage (v) 0 gnd pin current (ma) 25 20 15 10 5 0 4 1963a g15 1 2 3 1098765 r l = 330, i l = 100ma* r l = 33, i l = 100ma* r l = 11, i l = 300ma* t j = 25c v shdn = v in *for v out = 3.3v lt1963a-3.3 gnd pin current input voltage (v) 0 quiescent current (ma) 14 12 10 8 6 4 2 0 1963a g09 2 5 6 7 8 9 10 1 3 4 t j = 25c r l = v shdn = v in input voltage (v) 0 quiescent current (ma) 14 12 10 8 6 4 2 0 1963a g10 2 10 5 6 7 8 9 1 3 4 t j = 25c r l = v shdn = v in lt1963a-1.8 quiescent current lt1963a-2.5 quiescent current lt1963a-1.5 quiescent current input voltage (v) 0 0 quiescent current (ma) 2 6 8 10 14 1 5 7 1963a g41 4 12 4 9 10 2 3 6 8 t j = 25c r l = v shdn = v in input voltage (v) 0 quiescent current (ma) 14 12 10 8 6 4 2 0 1963a g11 2 10 5 6 7 8 9 1 3 4 t j = 25c r l = v shdn = v in lt1963a-3.3 quiescent current input voltage (v) 0 quiescent current (ma) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1963a g12 4 20 10 12 14 16 18 2 6 8 t j = 25c r l = 4.3k v shdn = v in lt1963a quiescent current lt1963a-1.5 gnd pin current input voltage (v) 0 gnd pin current (ma) 15 20 25 8 1963a g42 10 5 0 1 2 3 4 5 6 7 9 10 t j = 25c v shdn = v in *for v out = 1.5v r l = 5, i l = 300ma* r l = 15, i l = 100ma* r l = 150, i l = 10ma* t ypical per f or m ance charac t eris t ics
lt1963a series 9 1963afe t ypical per f or m ance charac t eris t ics input voltage (v) 0 gnd pin current (ma) 10 8 6 4 2 0 4 1963a g16 1 2 3 1098765 r l = 121, i l = 10ma* r l = 12.1, i l = 100ma* r l = 4.33, i l = 300ma* t j = 25c v shdn = v in *for v out = 1.21v lt1963a gnd pin current input voltage (v) 100 90 80 70 60 50 40 30 20 10 0 gnd pin current (ma) 1963a g17 0 1 2 3 4 5 6 7 8 9 10 r l = 1.8, i l = 1a* r l = 1.2, i l = 1.5a* r l = 3.6, i l = 500ma* t j = 25c v shdn = v in *for v out = 1.8v lt1963a-1.8 gnd pin current lt1963a-1.5 gnd pin current input voltage (v) 0 gnd pin current (ma) 60 80 100 8 1963a g43 40 20 50 70 90 30 10 0 21 43 6 7 9 5 10 t j = 25c v shdn = v in *for v out = 1.5v r l = 1, i l = 1.5a* r l = 1.5, i l = 1a* r l = 3, i l = 500ma* input voltage (v) 100 90 80 70 60 50 40 30 20 10 0 gnd pin current (ma) 1963a g18 0 1 2 3 4 5 6 7 8 9 10 r l = 2.5, i l = 1a* r l = 1.67, i l = 1.5a* r l = 5, i l = 500ma* t j = 25c v shdn = v in *for v out = 2.5v input voltage (v) 100 90 80 70 60 50 40 30 20 10 0 gnd pin current (ma) 1963a g19 0 1 2 3 4 5 6 7 8 9 10 r l = 3.3, i l = 1a* r l = 2.2, i l = 1.5a* r l = 6.6, i l = 500ma* t j = 25c v shdn = v in *for v out = 3.3v input voltage (v) 100 90 80 70 60 50 40 30 20 10 0 gnd pin current (ma) 1963a g20 0 1 2 3 4 5 6 7 8 9 10 r l = 1.21, i l = 1a* r l = 0.81, i l = 1.5a* r l = 2.42, i l = 500ma* t j = 25c v shdn = v in *for v out = 1.21v lt1963a-2.5 gnd pin current lt1963a-3.3 gnd pin current lt1963a gnd pin current output current (a) 100 90 80 70 60 50 40 30 20 10 0 gnd pin current (ma) 1963a g21 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 v in = v out (nominal) +1v temperature (c) ?50 shdn pin threshold (v) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 50 75 1963a g23 ?25 25 100 125 i l = 1ma i l = 1.5a temperature (c) ?50 shdn pin threshold (v) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 50 75 1963a g22 ?25 25 100 125 i l = 1ma gnd pin current vs i load shdn pin threshold (on-to-off) shdn pin threshold (off-to-on)
lt1963a series 10 1963afe t ypical per f or m ance charac t eris t ics temperature (c) ?50 7 6 5 4 3 2 1 0 25 75 1963a g25 ?25 0 50 100 125 shdn pin input current (a) v shdn = 20v temperature (c) ?50 adj pin bias current (a) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 50 75 1963a g26 ?25 25 100 125 adj pin bias current shdn pin voltage (v) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 shdn pin input current (a) 1963a g24 0 2 4 6 8 10 12 14 16 18 20 input/output differential (v) 0 2 6 10 14 18 current limit (a) 3.0 2.5 2.0 1.5 1.0 0.5 0 4 8 12 16 1963a g27 20 t j = 125c t j = 25c t j = ?50c v out = 100mv current limit current limit temperature (c) ?50 current limit (a) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 50 75 1963a g28 ?25 25 100 125 v in = 7v v out = 0v output voltage (v) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 reverse output current (ma) 1963a g29 0 1 2 3 4 5 6 7 8 9 10 lt1963a lt1963a-1.5 lt1963a-3.3 t j = 25c v in = 0v current flows into output pin v out = v adj (lt1963a) v out = v fb (lt1963a-1.5/1.8/-2.5/-3.3) lt1963a-2.5 lt1963a-1.8 temperature (c) ?50 reverse output current (ma) 0 50 75 1963a g30 ?25 25 100 125 lt1963a-1.8/-2.5/-3.3 lt1963a v in = 0v v out = 1.21v (lt1963a) v out = 1.5v (lt1963a-1.5) v out = 1.8v (lt1963a-1.8) v out = 2.5v (lt1963a-2.5) v out = 3.3v (lt1963a-3.3) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 reverse output current reverse output current shdn pin input current shdn pin input current
lt1963a series 11 1963afe t ypical per f or m ance charac t eris t ics frequency (hz) ripple rejection (db) 80 70 60 50 40 30 20 10 0 10 1k 10k 1m 1963a g31 100 100k c out = 10f tantalum c out = 100f tantalum +10 1f ceramic i l = 0.75a v in = v out(nominal) +1v + 50mv rms ripple temperature (c) ?50 76 74 72 70 68 66 64 62 25 75 1963a g32 ?25 0 50 100 125 ripple rejection (db) i l = 0.75a v in = v out(nominal) +1v + 0.5v p-p ripple at f = 120hz ripple rejection ripple rejection temperature (c) ?50 minimum input voltage (v) 3.0 2.5 2.0 1.5 1.0 0.5 0 25 75 1963a g33 ?25 0 50 100 125 i l = 1.5a i l = 500ma i l = 100ma lt1963a minimum input voltage temperature (c) ?50 load regulation (mv) 10 5 0 ?5 ?10 ?15 ?20 25 75 1963a g34 ?25 0 50 100 125 lt1963a lt1963a-3.3 lt1963a-1.8 lt1963a-2.5 lt1963a-1.5 v in = v out(nominal) +1v (lt1963a-1.8/-2.5/-3.3) v in = 2.7v (lt1963a/lt1963a-1.5) i l = 1ma to 1.5a frequency (hz) 0.01 output noise spectral density (v/hz) 0.1 10 100 1k 10k 100k 1.0 1963a g35 c out = 10f i l =1.5a lt1963a-3.3 lt1963a-2.5 lt1963a-1.8 lt1963a lt1963a-1.5 load regulation output noise spectral density load current (a) output noise voltage (v rms ) 50 45 40 35 30 25 20 15 10 5 0 0.0001 0.01 0.1 10 1963a g36 0.001 1 c out = 10f lt1963a-3.3 lt1963a-2.5 lt1963a-1.8 lt1963a-1.5 lt1963a v out 100v/div 1ms/div c out = 10f i load = 1.5a 1963a g37 rms output noise vs load current (10hz to 100khz) lt1963a-3.3 10hz to 100khz output noise
lt1963a series 12 1963afe t ypical per f or m ance charac t eris t ics time (s) 200 150 100 50 0 ?50 ?100 0.6 0.4 0.2 0 output voltage deviation (mv) 1963a g38 0 2 4 6 8 10 12 14 16 18 20 v in = 4.3v c in = 3.3f tantalum c out = 10f tantalum load current (a) time (s) 150 100 50 0 ?50 ?100 ?150 1.5 1.0 0.5 0 output voltage deviation (mv) load current (a) 1963a g39 0 50 100 150 250 300 350 400 450 500 200 v in = 4.3v c in = 33f tantalum c out = 100f tantalum +10 1f ceramic lt1963a-3.3 transient response lt1963a-3.3 transient response
lt1963a series 13 1963afe p in func t ions be off when the shdn pin is pulled low. the shdn pin can be driven either by 5v logic or open-collector logic with a pull-up resistor. the pull-up resistor is required to supply the pull-up current of the open-collector gate, normally several microamperes, and the shdn pin current, typically 3a. if unused, the shdn pin must be connected to v in . the device will be in the low power shutdown state if the shdn pin is not connected. in: input. power is supplied to the device through the in pin. a bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. in general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. a bypass capacitor in the range of 1f to 10f is sufficient. the lt1963a regula - tors are designed to withstand reverse voltages on the in pin with respect to ground and the out pin. in the case of a reverse input, which can happen if a battery is plugged in backwards, the device will act as if there is a diode in series with its input. there will be no reverse current flow into the regulator and no reverse voltage will appear at the load. the device will protect both itself and the load. out: output. the output supplies power to the load. a minimum output capacitor of 10f is required to prevent oscillations. larger output capacitors will be required for applications with large transient loads to limit peak voltage transients. see the applications information section for more information on output capacitance and reverse output characteristics. sense: sense. for fixed voltage versions of the lt1963a (lt1963a-1.5/lt1963a-1.8/lt1963a-2.5/lt1963a-3.3), the sense pin is the input to the error amplifier. optimum regulation will be obtained at the point where the sense pin is connected to the out pin of the regulator. in criti- cal applications, small voltage drops are caused by the resistance (r p ) of pc traces between the regulator and the load. these may be eliminated by connecting the sense pin to the output at the load as shown in figure 1 (kelvin sense connection). note that the voltage drop across the external pc traces will add to the dropout voltage of the regulator. the sense pin bias current is 600a at the nominal rated output voltage. the sense pin can be pulled below ground (as in a dual supply system where the regulator load is returned to a negative supply) and still allow the device to start and operate. adj: adjust. for the adjustable lt1963a, this is the input to the error amplifier. this pin is internally clamped to 7v. it has a bias current of 3a which flows into the pin. the adj pin voltage is 1.21v referenced to ground and the output voltage range is 1.21v to 20v. shdn: shutdown. the shdn pin is used to put the lt1963a regulators into a low power shutdown state. the output will figure 1. kelvin sense connection in shdn 1963a f01 r p out v in sense gnd lt1963a r p + + load
lt1963a series 14 1963afe the lt1963a series are 1.5a low dropout regulators opti - mized for fast transient response. the devices are capable of supplying 1.5a at a dropout voltage of 350mv. the low operating quiescent current (1ma) drops to less than 1a in shutdown. in addition to the low quiescent current, the lt1963a regulators incorporate several protection features which make them ideal for use in battery-powered systems. the devices are protected against both reverse input and reverse output voltages. in battery backup applications where the output can be held up by a backup battery when the input is pulled to ground, the lt1963a - x acts like it has a diode in series with its output and prevents reverse current flow . additionally, in dual supply applications where the regulator load is returned to a negative supply, the output can be pulled below ground by as much as 20v and still allow the device to start and operate. adjustable operation the adjustable version of the lt1963a has an output volt - age range of 1.21v to 20v. the output voltage is set by the ratio of two external resistors as shown in figure 2. the device servos the output to maintain the voltage at the adj pin at 1.21v referenced to ground. the current in r1 is then equal to 1.21v/r1 and the current in r2 is the current in r1 plus the adj pin bias current. the adj pin bias current, 3a at 25c, flows through r2 into the adj pin. the output voltage can be calculated using the formula in figure 2. the value of r1 should be less than 4.17k to minimize errors in the output voltage caused by the adj pin bias current. note that in shutdown the output is turned off and the divider current will be zero. the adjustable device is tested and specified with the adj pin tied to the out pin for an output voltage of 1.21v. specifications for output voltages greater than 1.21v will be proportional to the ratio of the desired output voltage to 1.21v: v out /1.21v. for example, load regulation for an output current change of 1ma to 1.5a is C 3mv typical at v out = 1.21v. at v out = 5v, load regulation is: (5v/1.21v)(C3mv) = C12.4mv output capacitors and stability the lt1963a regulator is a feedback circuit. like any feedback circuit, frequency compensation is needed to make it stable. for the lt1963a, the frequency compensa- tion is both internal and externalthe output capacitor. the size of the output capacitor, the type of the output capacitor, and the esr of the particular output capacitor all affect the stability. in addition to stability, the output capacitor also affects the high frequency transient response. the regulator loop has a finite band width. for high frequency transient loads, recovery from a transient is a combination of the output capacitor and the bandwidth of the regulator. the lt1963a was designed to be easy to use and accept a wide variety of output capacitors. however, the frequency compensation is affected by the output capacitor and opti- mum frequency stability may require some esr, especially with ceramic capacitors. for ease of use, low esr polytantalum capacitors (poscap) are a good choice for both the transient response and stability of the regulator. these capacitors have intrinsic esr that improves the stability. ceramic capacitors have extremely low esr, and while they are a good choice in many cases, placing a small series resistance element will sometimes achieve optimum stability and minimize ringing. in all cases, a minimum of 10f is required while the maximum esr allowable is 3. the place where esr is most helpful with ceramics is low output voltage. at low output voltages, below 2.5v, some esr helps the stability when ceramic output capaci - tors are used. also, some esr allows a smaller capaci- tor value to be used. when small signal ringing occurs with ceramics due to insufficient esr, adding esr or increas-ing the capacitor value improves the stability and reduces the ringing. table 1 gives some recommended values of esr to minimize ringing caused by fast, hard current transitions. in 1963a f02 r2 out v in v out adj gnd lt1963a r1 + figure 2. adjustable operation v out = 1.21v 1 + r2 r1 ? ? ? ? ? ? + i adj ( ) r2 ( ) v adj = 1.21v i adj = 3 a at 25 c output range = 1.21v to 20v a pplica t ions i n f or m a t ion
lt1963a series 15 1963afe poscap capacitors are used. the output voltage is at the wo rst case value of 1.2v. trace a, is with a 10f ceramic output capacitor and shows significant ringing with a peak amplitude of 25mv. for trace b, a 22f/45m poscap is added in parallel with the 10f ceramic. the output is well damped and settles to within 10mv in less than 20s. for trace c, a 100f/35m poscap is connected in parallel with the 10f ceramic capacitor. in this case the peak output deviation is less than 20mv and the output settles in about 10s. for improved transient response the value of the bulk capacitor (tantalum or aluminum electrolytic) should be greater than twice the value of the ceramic capacitor. tantalum and polytantalum capacitors there is a variety of tantalum capacitor types available, with a wide range of esr specifications. older types have esr specifications in the hundreds of m to several ohms. some newer types of polytantalum with multi-electrodes have maximum esr specifications as low as 5m. in gen- eral the lower the esr specification, the larger the size and the higher the price. polytantalum capacitors have better surge capability than older types and generally lower esr. some types such as the sanyo tpe and tpb series have esr specifications in the 20m to 50m range, which provide near optimum transient response. aluminum electrolytic capacitors aluminum electrolytic capacitors can also be used with the lt1963a. these capacitors can also be used in conjunction with ceramic capacitors. these tend to be the cheapest and lowest performance type of capacitors. care must be used in selecting these capacitors as some types can have esr which can easily exceed the 3 maximum value. ceramic capacitors extra consideration must be given to the use of ceramic capacitors. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. the most common dielectrics used are z5u, y5v, x5r and x7r. the z5u and table 1. capacitor minimum esr v out 10f 22f 47f 100f 1.2v 20m 15m 10m 5m 1.5v 20m 15m 10m 5m 1.8v 15m 10m 10m 5m 2.5v 5m 5m 5m 5m 3.3v 0m 0m 0m 5m 5v 0m 0m 0m 0m figures 3 through 8 show the effect of esr on the transient response of the regulator. these scope photos show the transient response for the lt1963a at three different output voltages with various capacitors and various values of esr. the output load conditions are the same for all traces. in all cases there is a dc load of 500ma. the load steps up to 1a at the first transition and steps back to 500ma at the second transition. at the worst case point of 1.2v out with 10f c out (figure 3), a minimum amount of esr is required. while 20m is enough to eliminate most of the ringing, a value closer to 50m provides a more optimum response. at 2.5v output with 10f c out (figure 4) the output rings at the transitions with 0 esr but still settles to within 10mv in 20s after the 0.5a load step. once again a small value of esr will provide a more optimum response. at 5v out with 10f c out (figure 5) the response is well damped with 0 esr. with a c out of 100f at 0 esr and an output of 1.2v (figure 6), the output rings although the amplitude is only 20mv p-p . with c out of 100f it takes only 5m to 20m of esr to provide good damping at 1.2v output. performance at 2.5v and 5v output with 100f c out shows similar characteristics to the 10f case (see figures 7-8). at 2.5v out 5m to 20m can improve transient response. at 5v out the response is well damped with 0 esr. capacitor types with inherently higher esr can be com bined with 0m esr ceramic capacitors to achieve both good high frequency bypassing and fast settling time. figure 9 illustrates the improvement in transient response that can be seen when a parallel combination of ceramic and applica t ions in f or m a t ion
lt1963a series 16 1963afe v out = 1.2v i out = 500ma with 500ma pulse c out = 10f 0 20 50 100 r esr (m) figure 3 v out = 1.2v i out = 500ma with 500ma pulse c out = a = 10f ceramic b = 10f ceramic ii 22f/45m poly c = 10f ceramic ii 100f/35m poly figure 9 r esr (m) a b c 1963a f09 1963a f03 20s/div 50mv/div 50s/div 50mv/div v out = 1.2v i out = 500ma with 500ma pulse c out = 100f v out = 2.5v i out = 500ma with 500ma pulse c out = 10f v out = 5v i out = 500ma with 500ma pulse c out = 10f v out = 5v i out = 500ma with 500ma pulse c out = 100f figure 8 r esr (m) 0 5 10 20 1963a f08 50s/div 50mv/div figure 5 0 20 50 100 r esr (m) 1963a f05 20s/div 50mv/div figure 4 r esr (m) 1963a f04 0 20 50 100 20s/div 50mv/div figure 6 r esr (m) 0 5 10 20 1963a f06 50s/div 50mv/div v out = 2.5v i out = 500ma with 500ma pulse c out = 100f figure 7 r esr (m) 0 5 10 20 1963a f07 50s/div 50mv/div applica t ions in f or m a t ion
lt1963a series 17 1963afe y5v dielectrics are good for providing high capacitances in a small package, but exhibit strong voltage and temperature coefficients as shown in figures 10 and 11. when used with a 5v regulator, a 10f y5v capacitor can exhibit an effective value as low as 1f to 2f over the operating temperature range. the x5r and x7r dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. the x7r type has better stability across temperature, while the x5r is less expensive and is available in higher values. voltage and temperature coefficients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or micro- phone works. for a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. free resistance with pc traces the resistance values shown in table 2 can easily be made using a small section of pc trace in series with the output capacitor. the wide range of non-critical esr makes it easy to use pc trace. the trace width should be sized to handle the rms ripple current associated with the load. the output capacitor only sources or sinks current for a few microseconds during fast output current transitions. there is no dc current in the output capacitor. worst case ripple current will occur if the output load is a high frequency (>100khz) square wave with a high peak value and fast edges (< 1s). measured rms value for this case is 0.5 times the peak-to-peak current change. slower edges or lower frequency will significantly reduce the rms ripple current in the capacitor. figure 10. ceramic capacitor dc bias characteristics dc bias voltage (v) change in value (%) 1963a f10 20 0 ?20 ?40 ?60 ?80 ?100 0 4 8 10 2 6 12 14 x5r y5v 16 both capacitors are 16v, 1210 case size, 10f figure 11. ceramic capacitor temperature characteristics temperature (c) ?50 40 20 0 ?20 ?40 ?60 ?80 ?100 25 75 1963a f11 ?25 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v, 1210 case size, 10f applica t ions in f or m a t ion table 2. pc trace resistors 10m 20m 30m 0.5oz c u width length 0.011 " (0.28mm) 0.102 " (2.6mm) 0.011 " (0.28mm) 0.204 " (5.2mm) 0.011 " (0.28mm) 0.307 " (7.8mm) 1.0oz c u width length 0.006 " (0.15mm) 0.110 " (2.8mm) 0.006 " (0.15mm) 0.220 " (5.6mm) 0.006 " (0.15mm) 0.330 " (8.4mm) 2.0oz c u width length 0.006 " (0.15mm) 0.224 " (5.7mm) 0.006 " (0.15mm) 0.450 " (11.4mm) 0.006 " (0.15mm) 0.670 " (17mm)
lt1963a series 18 1963afe applica t ions in f or m a t ion typically 40nv/ hz over this frequency bandwidth for the lt1963a (adjustable version). for higher output voltages (generated by using a resistor divider), the output voltage noise will be gained up accordingly. this results in rms noise over the 10hz to 100khz bandwidth of 14v rms for the lt1963a increasing to 38v rms for the lt1963a-3.3. higher values of output voltage noise may be measured when care is not exercised with regard to circuit layout and testing. crosstalk from nearby traces can induce unwanted noise onto the output of the lt1963a-x. power supply ripple rejection must also be considered; the lt1963a regulators do not have unlimited power supply rejection and will pass a small portion of the input noise through to the output. thermal considerations the power handling capability of the device is limited by the maximum rated junction temperature (125c). the power dissipated by the device is made up of two components: 1. output current multiplied by the input/output voltage differential: (i out )(v in C v out ), and 2. gnd pin current multiplied by the input voltage: (i gnd ) (v in ). the gnd pin current can be found using the gnd pin current curves in the typical performance characteristics. power dissipation will be equal to the sum of the two components listed above. the lt1963a series regulators have internal thermal limiting designed to protect the device during overload conditions. for continuous normal conditions, the maxi- mum junction temperature rating of 125c must not be exceeded. it is important to give careful consideration to all sources of thermal resistance from junction to ambi - ent. additional heat sources mounted nearby must also be considered. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces. copper board stiffeners and plated through-holes can also be used to spread the heat gener - ated by power devices. this resistor should be made using one of the inner layers of the pc board which are well defined. the resistiv- ity is determined primarily by the sheet resistance of the copper laminate with no additional plating steps. table 2 gives some sizes for 0.75a rms current for various copper thicknesses. more detailed information regarding resistors made from pc traces can be found in application note 69, appendix a. overload recovery like many ic power regulators, the lt1963a-x has safe op - erating area protection. the safe area protection decreases the current limit as input-to-output voltage increases and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. the protection is designed to provide some output current at all values of input-to-output voltage up to the device breakdown. when power is first turned on, as the input voltage rises, the output follows the input, allowing the regulator to start up into very heavy loads. during the start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. with a high input voltage, a problem can occur wherein removal of an output short will not allow the output voltage to recover. other regulators, such as the lt1085, also exhibit this phenomenon, so it is not unique to the lt1963a-x. the problem occurs with a heavy output load when the input voltage is high and the output voltage is low. common situations are immediately after the removal of a short- circuit or when the shutdown pin is pulled high after the input voltage has already been turned on. the load line for such a load may intersect the output current curve at two points. if this happens, there are two stable output operat - ing points for the regulator. with this double intersection, the input power supply may need to be cycled down to zero and brought up again to make the output recover. output voltage noise the lt1963a regulators have been designed to provide low output voltage noise over the 10hz to 100khz band- width while operating at full load. output voltage noise is
lt1963a series 19 1963afe applica t ions in f or m a t ion the following tables list thermal resistance for several different board sizes and copper areas. all measurements were taken in still air on 1/16" fr-4 board with one ounce copper. table 3. q package, 5-lead dd copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 23c/w 1000mm 2 2500mm 2 2500mm 2 25c/w 125mm 2 2500mm 2 2500mm 2 33c/w *device is mounted on topside table 4. s0-8 package, 8-lead so copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 55c/w 1000mm 2 2500mm 2 2500mm 2 55c/w 225mm 2 2500mm 2 2500mm 2 63c/w 125mm 2 2500mm 2 2500mm 2 69c/w *device is mounted on topside table 5. sot-223 package, 3-lead sot-223 copper area thermal resistance topside* backside board area (junction-to-ambient) 2500mm 2 2500mm 2 2500mm 2 42c/w 1000mm 2 2500mm 2 2500mm 2 42c/w 225mm 2 2500mm 2 2500mm 2 50c/w 100mm 2 2500mm 2 2500mm 2 56c/w 1000mm 2 1000mm 2 1000mm 2 49c/w 1000mm 2 0mm 2 1000mm 2 52c/w *device is mounted on topside t package, 5-lead to-220 thermal resistance (junction-to-case) = 4c/w calculating junction temperature example: given an output voltage of 3.3v, an input volt- age range of 4v to 6v, an output current range of 0ma to 500ma and a maximum ambient temperature of 50c, what will the maximum junction temperature be? the power dissipated by the device will be equal to: i out(max) (v in(max) C v out ) + i gnd (v in(max) ) where, i out(max) = 500ma v in(max) = 6v i gnd at (i out = 500ma, v in = 6v) = 10ma so, p = 500ma(6v C 3.3v) + 10ma(6v) = 1.41w using a dd package, the thermal resistance will be in the range of 23c/w to 33c/w depending on the copper area. so the junction temperature rise above ambient will be approximately equal to: 1.41w(28c/w) = 39.5c the maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or: t jmax = 50c + 39.5c = 89.5c protection features the lt1963a regulators incorporate several protection features which make them ideal for use in battery-powered circuits. in addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the devices are protected against reverse input voltages, reverse output voltages and reverse voltages from output to input. current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. for normal opera- tion, the junction temperature should not exceed 125c. the input of the device will withstand reverse voltages of 20v. current flow into the device will be limited to less than 1ma (typically less than 100a) and no negative voltage will appear at the output. the device will protect both itself and the load. this provides protection against batteries that can be plugged in backward.
lt1963a series 20 1963afe applica t ions in f or m a t ion the output of the lt1963a can be pulled below ground without damaging the device. if the input is left open circuit or grounded, the output can be pulled below ground by 20v. for fixed voltage versions, the output will act like a large resistor, typically 5k or higher, limiting current flow to typically less than 600a. for adjustable versions, the output will act like an open circuit; no current will flow out of the pin. if the input is powered by a voltage source, the output will source the short-circuit current of the device and will protect itself by thermal limiting. in this case, grounding the shdn pin will turn off the device and stop the output from sourcing the short-circuit current. the adj pin of the adjustable device can be pulled above or below ground by as much as 7v without damaging the device. if the input is left open circuit or grounded, the adj pin will act like an open circuit when pulled below ground and like a large resistor (typically 5k) in series with a diode when pulled above ground. in situations where the adj pin is connected to a resistor divider that would pull the adj pin above its 7v clamp volt- age if the output is pulled high, the adj pin input current must be limited to less than 5ma. for example, a resistor divider is used to provide a regulated 1.5v output from the 1.21v reference when the output is forced to 20v. the top resistor of the resistor divider must be chosen to limit the current into the adj pin to less than 5ma when the adj pin is at 7v. the 13v difference between out and adj pins divided by the 5ma maximum current into the adj pin yields a minimum top resistor value of 2.6k. figure 12. reverse output current output voltage (v) 0 reverse output current (ma) 3.0 4.0 5.0 8 1963a f12 2.0 1.0 2.5 3.5 4.5 1.5 0.5 0 2 1 3 4 6 9 7 5 10 lt1963a v out = v adj t j = 25c v in = 0v current flows into output pin lt1963a-2.5 v out = v fb lt1963a-3.3 v out = v fb lt1963a-1.8 v out = v fb lt1963a-1.5 v out = v fb in circuits where a backup battery is required, several different input/output conditions can occur. the output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open circuit. current flow back into the output will follow the curve shown in figure 12. when the in pin of the lt1963a is forced below the out pin or the out pin is pulled above the in pin, input cur - rent will typically drop to less than 2a. this can happen if the input of the device is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. the state of the shdn pin will have no effect on the reverse output current when the output is pulled above the input.
lt1963a series 21 1963afe typical a pplica t ions 10vac at 115v in 10vac at 115v in ? + ? + ? + 750 +v +v +v +v +v 1/2 lt1018 1/2 lt1018 lt1006 10k 10k 10k 200k 0.1f 22f 1f 0.033f 1n4148 1n4148 lt1004 1.2v 750 a1 c1a c1b 34k* 12.1k* 3.3v out 1.5a l1 500h 10000f to all ?+v? points 22f 1n4002 1n4002 1n4002 1n4148 ?sync? 1k l2 90-140 vac 1963a ta03 lt1963a-3.3 in shdn out fb gnd 2.4k + + + l1 = coiltronics ctx500-2-52 l2 = stancor p-8559 * = 1% film resistor = nte5437 scr pre-regulator provides efficiency over line variations lt1963a-3.3 gnd lt1963a in shdn out fb in shdn out fb gnd + + r1, 0.01 r2 0.01 r3 2.2k r4 2.2k r5 1k r6 6.65k r7 4.12k c1 100f c3 0.01f c2 22f v in > 3.7v shdn 3.3v 3a 8 4 3 2 1 ? + 1/2 lt1366 1963a ta05 paralleling of regulators for higher output current
lt1963a series 22 1963afe pac k age d escrip t ion q(dd5) 0610 rev e .028 ? .038 (0.711 ? 0.965) typ .143 +.012 ?.020 ( ) 3.632 +0.305 ?0.508 .067 (1.702) bsc .013 ? .023 (0.330 ? 0.584) .095 ? .115 (2.413 ? 2.921) .004 +.008 ?.004 ( ) 0.102 +0.203 ?0.102 .050 .012 (1.270 0.305) .059 (1.499) typ .045 ? .055 (1.143 ? 1.397) .165 ? .180 (4.191 ? 4.572) .330 ? .370 (8.382 ? 9.398) .060 (1.524) typ .390 ? .415 (9.906 ? 10.541) 15 typ .420 .350 .585 .090 .042 .067 recommended solder pad layout .325 .205 .080 .585 .090 recommended solder pad layout for thicker solder paste applications .042 .067 .420 .276 .320 note: 1. dimensions in inch/(millimeter) 2. drawing not to scale .300 (7.620) .075 (1.905) .183 (4.648) .060 (1.524) .060 (1.524) .256 (6.502) bottom view of dd pak hatched area is solder plated copper heat sink q package 5-lead plastic dd pak (reference ltc dwg # 05-08-1461 rev e) q package 5-lead plastic dd-pak (reference ltc dwg # 05-08-1461 rev e)
lt1963a series 23 1963afe pac k age d escrip t ion s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) .016 ? .050 (0.406 ? 1.270) .010 ? .020 (0.254 ? 0.508) 45 0? 8 typ .008 ? .010 (0.203 ? 0.254) so8 0303 .053 ? .069 (1.346 ? 1.752) .014 ? .019 (0.355 ? 0.483) typ .004 ? .010 (0.101 ? 0.254) .050 (1.270) bsc 1 2 3 4 .150 ? .157 (3.810 ? 3.988) note 3 8 7 6 5 .189 ? .197 (4.801 ? 5.004) note 3 .228 ? .244 (5.791 ? 6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm)
lt1963a series 24 1963afe pac k age d escrip t ion st package 3-lead plastic sot-223 (reference ltc dwg # 05-08-1630) .114 ? .124 (2.90 ? 3.15) .248 ? .264 (6.30 ? 6.71) .130 ? .146 (3.30 ? 3.71) .264 ? .287 (6.70 ? 7.30) .0905 (2.30) bsc .033 ? .041 (0.84 ? 1.04) .181 (4.60) bsc .024 ? .033 (0.60 ? 0.84) .071 (1.80) max 10 max .012 (0.31) min .0008 ? .0040 (0.0203 ? 0.1016) 10 ? 16 .010 ? .014 (0.25 ? 0.36) 10 ? 16 recommended solder pad layout st3 (sot-233) 0502 .129 max .059 max .059 max .181 max .039 max .248 bsc .090 bsc
lt1963a series 25 1963afe pac k age d escrip t ion t package 5-lead plastic to-220 (standard) (reference ltc dwg # 05-08-1421) t5 (to-220) 0801 .028 ? .038 (0.711 ? 0.965) .067 (1.70) .135 ? .165 (3.429 ? 4.191) .700 ? .728 (17.78 ? 18.491) .045 ? .055 (1.143 ? 1.397) .095 ? .115 (2.413 ? 2.921) .013 ? .023 (0.330 ? 0.584) .620 (15.75) typ .155 ? .195* (3.937 ? 4.953) .152 ? .202 (3.861 ? 5.131) .260 ? .320 (6.60 ? 8.13) .165 ? .180 (4.191 ? 4.572) .147 ? .155 (3.734 ? 3.937) dia .390 ? .415 (9.906 ? 10.541) .330 ? .370 (8.382 ? 9.398) .460 ? .500 (11.684 ? 12.700) .570 ? .620 (14.478 ? 15.748) .230 ? .270 (5.842 ? 6.858) bsc seating plane * measured at the seating plane
lt1963a series 26 1963afe p ac k age descrip t ion fe package 16-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663 rev h) exposed pad variation bb fe16 (bb) tssop rev g 0910 0.09 ? 0.20 (.0035 ? .0079) 0 ? 8 0.25 ref 0.50 ? 0.75 (.020 ? .030) 4.30 ? 4.50* (.169 ? .177) 1 3 4 5 6 7 8 10 9 4.90 ? 5.10* (.193 ? .201) 16 1514 13 12 11 1.10 (.0433) max 0.05 ? 0.15 (.002 ? .006) 0.65 (.0256) bsc 2.94 (.116) 0.195 ? 0.30 (.0077 ? .0118) typ 2 recommended solder pad layout 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 2.94 (.116) 3.58 (.141) 3.58 (.141) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note: 1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc fe package 16-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663 rev h) exposed pad variation bb
lt1963a series 27 1963afe information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number e 02/11 updated fe and q package drawings in package description section 22, 26 (revision history begins at rev e)
lt1963a series 28 1963afe linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2005 lt 0211 rev e ? printed in usa r ela t e d p ar t s typical a pplica t ion part number description comments lt1175 500ma, micropower, negative ldo v in : C20v to C4.3v, v out(min) = C3.8v, v do = 0.50v, i q = 45a, i sd 10a, dd, sot-223, pdip8 packages lt1185 3a, negative ldo v in : C35v to C4.2v, v out(min) = C2.40v, v do = 0.80v, i q = 2.5ma, i sd <1a, to220-5 package lt1761 100ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 20a, i sd <1a thinsot? package lt1762 150ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 25a, i sd <1a, ms8 package lt1763 500ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 30a, i sd <1a, s8 package lt1764/ lt1764a 3a, low noise, fast transient response, ldo v in : 2.7v to 20v, v out(min) = 1.21v, v do = 0.34v, i q = 1ma, i sd <1a, dd, to220 packages ltc1844 150ma, very low drop-out ldo v in : 6.5v to 1.6v, v out(min) = 1.25v, v do = 0.08v, i q = 40a, i sd < 1a, thinsot package LT1962 300ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.27v, i q = 30a, i sd <1a, ms8 package lt1964 200ma, low noise micropower, negative ldo v in : C0.9v to C20v, v out(min) = C1.21v, v do = 0.34v, i q = 30a, i sd 3a, thinsot package lt1965 1.1a, low noise, low dropout linear regulator 290mv dropout voltage, low noise: 40v rms , v in : 1.8v to 20v, v out : 1.2v to 19.5v, stable with ceramic caps, to-220, dd-pak, msop and 3mm 3mm dfn packages lt3020 100ma, low voltage v ldo, v in(min) = 0.9v v in : 0.9v to 10v, v out(min) = 0.20, v do = 0.15v, i q = 120a, i sd <3a, dfn, ms8 packages lt3023 dual, 2x 100ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 40a, i sd <1a, dfn, ms10 packages lt3024 dual, 100ma/500ma, low noise micropower, ldo v in : 1.8v to 20v, v out(min) = 1.22v, v do = 0.30v, i q = 60a, i sd <1a, dfn, tssop packages lt3080/ lt3080-1 1.1a, parallelable, low noise, low dropout linear regulator 300mv dropout voltage (2-supply operation), low noise: 40v rms , v in : 1.2v to 36v, v out : 0v to 35.7v, current-based reference with 1-resistor v out set; directly parallelable (no op amp required), stable with ceramic caps, to-220, sot-223, msop and 3mm 3mm dfn packages; C1 version has integrated internal ballast resistor + lt1004-1.2 v in > 2.7v c1 10f r3 2k r1 1k r2 80.6k r4 2.2k r5 0.01 r6 2.2k lt1963a-1.8 in shdn out fb gnd ? + 1/2 lt1366 r8 100k load r7 470 2 1 8 3 4 c3 1f c2 3.3f 1963a ta04 note: adjust r1 for 0a to 1.5a constant current adjustable current source

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